View LTC1695_8364168.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LTC1695 1 features applicatio s u descriptio u typical applicatio n u the ltc ? 1695 fan speed controller provides all the func- tions necessary for a power management microprocessor to regulate the speed of a 5v brushless dc fan via a 2-wire smbus/i 2 c interface. fan speed is controlled according to the systems required temperature profile and permits lower fan power consumption, longer battery run time and lower acoustical generated noise versus systems that only provide simple on-off control for the fan. the LTC1695 incorporates a 180ma low dropout linear regulator, a 2-wire smbus/i 2 c interface and a 6-bit dac. fan speed is controlled by varying the fans terminal voltage through the output voltage of the LTC1695s linear regulator. the LTC1695s output voltage is programmed by sending a 6-bit digital code to the LTC1695 dac via the smbus. to eliminate fan start-up problems at lower fan voltages, users can enable the LTC1695s boost start feature that provides the dacs full-scale output voltage for 250ms before decreasing to the programmed output voltage. the LTC1695 includes output current limiting and thermal shutdown as well as status monitors that can be read back by the microprocessor during fault conditions. the LTC1695 is available in a 5-lead sot-23 package. n notebook computers n spot cooling n portable instruments n battery-powered systems n dc motor control n white led power supplies n programmable low dropout regulator n complete smbus/i 2 c tm brushless dc fan speed control system in a 5-pin sot-23 package n 0.75 w pmos linear regulator with 180ma output current rating n 0v to 4.922v output voltage range controlled by a 6-bit dac n simple 2-wire smbus/i 2 c interface n 250ms internal timer ensures fan start-up n current limit and thermal shutdown n fault status indication via smbus host readback smbus/i 2 c fan speed controller in sot-23 LTC1695 15 2 3 4 v cc gnd scl v out sda + system controller + 4.7 m f 10 m f 5v dc fan sunon kde0502pfb2-8 0.6w, 1.7 cfm (25 ?25 ?10)mm 3 5v 1695 ?ta01 fan voltage and current vs dac code dac code 0 load current (ma) output voltage (v) 120 100 80 60 40 20 0 6 5 4 3 2 1 0 30 50 1695 ?ta02 10 20 40 60 70 v cc = 5v t a = 25 c i load v out , ltc and lt are registered trademarks of linear technology corporation. i 2 c is a trademark of philips electronics n.v.
LTC1695 2 terminal voltages supply voltage (v cc ) ............................................. 7v all other inputs ........................ C0.3v to (v cc + 0.3v) operating temperature range ..................... 0 c to 70 c junction temperature ........................................... 125 c storage temperature range .................. C65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c order part number s5 part marking t jmax = 125 c, q ja = 256 c/w see the applications information section. consult factory for industrial and military grade parts. ltiy LTC1695cs5 absolute axi u rati gs w ww u package/order i for atio uu w (note 1) electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v unless otherwise stated. 4 sda 5 v out scl 3 v cc 1 top view s5 package 5-lead plastic sot-23 gnd 2 symbol parameter conditions min typ max units v cc supply voltage range 4.5 5 5.5 v i cc supply current, operating v out = full scale, i load = 150ma l 150.7 155 ma supply current, shutdown dac code = 0 l 80 200 m a dac dac resolution guaranteed monotonic l 6 bits v lsb 1lsb resolution i load = 1ma l 73 78 83 mv v os offset error i load = 1ma l 1 lsb dnl differential nonlinearity i load = 1ma (note 2) l 0.75 lsb inl integral nonlinearity i load = 1ma (note 2) l 0.75 lsb v fs v out , dac full scale i load = 20ma l 4.5 4.93 v i load = 150ma l 4.5 4.9 v v zs v out , dac zero scale r load = 1k w l 085 mv r on(p) p-channel on resistance i load = 150ma 0.75 w timer and thermal shutdown v uvlo undervoltage lockout voltage rising v cc l 2.3 2.9 3.5 v t bst_st boost start timer i load = 10ma, c load = 4.7 m f l 75 250 1000 ms t thermal thermal shutdown temperature (note 3) 155 c i fault output current limit threshold v out = 0v, dac code = 63 l 180 390 850 ma smbus scl, sda inputs v ih input high threshold l 2.1 v v il input low threshold l 0.8 v i in input current scl, sda = 0v or 5v l 0.1 5 m a c in input capacitance (note 3) 3 pf t on switch on time from v out from zero scale to full scale, l 50 500 m s stop condition (f smbus = 100khz) i load = 1ma, c load = 4.7 m f t off switch off time from v out from full scale to zero scale, l 150 500 m s stop condition (f smbus = 100khz) i load = 150ma, c load = 4.7 m f v ol sda output low voltage i pullup = 3ma l 150 400 mv
LTC1695 3 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v unless otherwise stated. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: inl, dnl specs are specified under a 1ma i load condition to keep the linear regulator from operating in dropout at higher dac codes. dnl is measured from code 0 to code 63, taking into account the untrimmed offset at code 0. please refer to the definitions section for more details. symbol parameter conditions min typ max units smbus timing (note 4) f smb smbus operating frequency l 10 100 khz t buf bus free time between stop and start l 4.7 m s t hd(sta) hold time after (repeated) start condition l 4.0 m s t su(sta) repeated start condition setup time l 4.7 m s t su(sto) stop condition setup time l 4.0 m s t hd(dat) data hold time l 300 ns t su(dat) data setup time l 250 ns t low clock low period l 4.7 m s t high clock high period l 4.0 50 m s t f clock/data fall time l 300 ns t r clock/data rise time l 1000 ns typical perfor a ce characteristics uw note 3: this typical specification is based on lab measurements and is not production tested. note 4 : guaranteed by design and not tested. please refer to the timing diagram section for additional information. dac code 0 output voltage (v) 6 5 4 3 2 1 0 10 20 30 40 1695 ?g01 50 60 63 v cc = 5v t a = 25 c i load = 1ma temperature ( c) ?0 supply current ( m a) 250 200 150 100 50 0 0 50 75 1695 ? g03 ?5 25 100 125 code 0 code 63 v cc = 5v supply voltage (v) 4.0 supply current ( m a) 6.0 1695 ?g02 4.5 5.0 5.5 250 200 150 100 50 0 code 0 code 63 t a = 25 c output voltage vs dac code no load supply current vs temperature no load supply current vs supply voltage
LTC1695 4 typical perfor a ce characteristics uw temperature ( c) ?0 ground current ( m a) 900 850 800 750 700 650 600 25 75 1695 ?g05 ?5 0 50 100 125 v cc = 5v i load = 180ma code 63 load current (ma) dropout voltage (mv) 175 150 125 100 75 50 25 0 1695 ?g06 0 20 40 80 60 100 120 140 180 160 v cc = 5v t a = 85 c t a = 40 c t a = 25 c temperature ( c) ?0 output voltage (v) 4.95 4.93 4.91 4.89 4.87 4.85 0 50 75 1695 ?g09 ?5 25 100 125 v cc = 5v code 63 i load = 1ma i load = 150ma temperature ( c) ?0 2.510 2.505 2.500 2.495 2.490 2.485 2.480 25 75 1695 ?g10 ?5 0 50 100 125 output voltage (v) v cc = 5v code 32 i load = 150ma i load = 1ma code 0 dnl (lsb) 0.25 0.15 0.05 ?.05 ?.15 ?.25 10 20 30 40 1695 ?g11 50 60 63 v cc = 5v i load = 1ma code 0 inl (lsb) 0.25 0.15 0.05 ?.05 ?.15 ?.25 10 20 30 40 1695 ?g12 50 60 63 v cc = 5v i load = 1ma ground current (dropout mode) vs supply voltage ground current (dropout mode) vs temperature dropout voltage vs load current output voltage (full scale) vs load current output voltage (midscale) vs load current output voltage (full scale) vs temperature differential nonlinearity (dnl) output voltage (midscale) vs temperature integral nonlinearity (inl) load current (ma) output voltage (v) 4.930 4.920 4.910 4.900 4.890 4.880 4.870 4.860 1695 ?g07 0 20 40 60 80 120 100 140 180 160 v cc = 5v t a = 25 c code 63 load current (ma) output voltage (v) 1695 ?g08 2.505 2.500 2.495 2.490 2.485 2.480 0 40 80 100 20 60 120 180 160 140 v cc = 5v t a = 25 c code 32 supply voltage (v) 4.0 ground current ( a) 6.0 1695 ?g04 4.5 5.0 5.5 900 800 700 600 500 400 t a =25 c i load = 180ma code 63
LTC1695 5 typical perfor a ce characteristics uw temperature ( c) ?0 supply voltage (v) 3.00 2.90 2.80 2.70 2.60 ?5 0 25 50 1695 ?g13 100 75 125 por (rising v cc ) uvlo (falling v cc ) supply voltage (v) 4.0 boost start timer (ms) 250 300 6.0 1695 ?g14 200 150 4.5 5.0 5.5 350 t a = 25 c i load = 10ma temperature ( c) ?5 boost start timer (ms) 600 500 400 300 200 100 0 0255075 1695 ?g15 100 v cc = 5v i load = 10ma supply voltage (v) 4.5 current limit (ma) 5.5 1695 ?g16 4.75 5.0 5.25 425 400 375 350 325 300 t a = 25 c temperature ( c) ?0 current limit (ma) 600 500 400 300 200 100 0 ?0 02040 1695 ?g17 60 80 90 v cc = 5v load current (ma) 0 20 100 140 160 junction temperature increase ( c) 120 120 100 80 60 40 20 0 1695 ?g18 40 60 80 180 code 16 (1.25v) code 32 (2.5v) code 48 (3.75v) code 63 (4.922v) v cc = 5v, t a = 25 c, sot-23 thermal resistance = 150 c/w (pcb soldered) see applications information. por and uvlo vs temperature boost start timer vs supply voltage boost start timer vs temperature current limit threshold vs supply voltage junction temperature increase vs load current current limit threshold vs temperature load transient response code 32, 5ma to 55ma load transient response code 32, 50ma to 100ma 1695 ?g19 v out (ac) 20mv/div i load 50ma/div 100 m s/div v cc = 5v c out = 4.7 m f tantalum 1695 ?g20 v out (ac) 10mv/div i load 50ma/div 100 m s/div v cc = 5v c out = 4.7 m f tantalum
LTC1695 6 pi n fu n ctio n s uuu v cc (pin 1): power supply input. v cc supplies current to the internal control circuitry, serves as the reference for the 6-bit dac and acts as the power path for the p-channel low dropout linear regulator. bypass v cc directly to ground with a low esr capacitor 3 10 m f. gnd (pin 2): ground. tie gnd to the ground plane. scl (pin 3): smbus clock input. data is shifted into sda on the rising edge of the scl clock signal during data transfer. sda (pin 4): smbus bidirectional data input/digital out- put. sda is an open drain output and requires a pull-up resistor or current source to v cc . data is shifted into sda and acknowledged by sda. v out (pin 5): linear regulator output. connect directly to the fans +v e terminal. v out is set to v zs (code 0) on power-up. for good transient response and stability, use a general purpose, low cost, medium esr (0.1 w to 1 w ) tantalum or electrolytic capacitor. ltc recommends a surface mount tantalum capacitor of 3 4.7 m f. 1695 ?g21 v out (ac) 20mv/div i load 50ma/div 100 m s/div v cc = 5v c out = 4.7 m f tantalum 1695 ?g22 v out (ac) 20mv/div i load 50ma/div 100 m s/div v cc = 5v c out = 4.7 m f tantalum 1695 ?g23 v out 2v/div 100ms/div v cc = 5v c in = 10 m f c out = 4.7 m f i load = 1ma typical perfor a ce characteristics uw load transient response dropout (code 63), 5ma to 55ma load transient response dropout (code 63), 50ma to 100ma boost start timer
LTC1695 7 block diagra w + op amp power on reset and uvlo shutdown control thermal shutdown boost start timer 6-bit dac (resistors, switches) command register smbus interface (buffers, logic) data register scl sda pull-down/up logic current limit r1 50k gnd v out v cc p1 0.75 w 1695 ?bd r2 50k 6
LTC1695 8 switchi n g wavefor m s uw boost start timer measurement i load = 10ma, c load = 4.7 m f output switch on time measurement code = 63, i load = 1ma, c load = 4.7 m f f smbus =100khz output switch off time measurement code = 0, i load = 150ma, c load = 4.7 m f f smbus =100khz v out = v fs t bst_st 90% v fs 90% v fs v out = v zs v out = v(code 32) 1695 ?sw01 t off v out = v fs v out = v zs 10% v fs stop condition 12 13 14 15 16 17 18 19 d5 d4 d3 d2 d1 d0 ack command byte 1695 ?sw03 t on v out = v fs 90% v fs v out = v zs stop condition 12 13 14 15 16 17 18 19 d5 d4 d3 d2 d1 d0 ack command byte 1695 ?sw02
LTC1695 9 ti i g diagra u ww d5 d4 d3 d2 d1 d0 ack bst x ack wr 0 0 1 0 1 1 1 1695 ?td01 p s 12 13 14 15 16 17 18 567891011 1234 19 command byte slave address scl sda s = smbus start bit p = smbus stop bit bst = 1 enables the boost start timer d5 to d0 = 6-bit input code for the dac (d5 = msb) x = don't care smbus send byte protocol, with smbus address = 1110100b ack the ocf ack wr 0 0 1 00 00 0 0 0 1 1 1 p s 12 13 14 15 16 17 18 567891011 1234 19 command byte slave address scl sda s = smbus start bit p = smbus stop bit ocf = 1 signals that the LTC1695 is in current limit the = 1 signals that the LTC1695 is in thermal shutdown smbus receive byte protocol, with smbus address = 1110100b operating sequence t buf t low t high t r t f t hd(sta) t hd(sta) t hd(dat) t su(sta) t su(sto) t su(dat) stop stop start start sda scl 1695 ?td02 timing for smbus interface
LTC1695 10 definitions resolution: the number of dac output states (2 n ) that divide the full-scale range. the resolution does not imply linearity. full-scale voltage (v fs ): the regulator output voltage (v out ) if all dac bits are set to ones (code 63). voltage offset error (v os ): the regulator output voltage if all dac bits are set to zeros. the ldo amplifier can have a true negative offset, but due to the LTC1695s single supply operation, v out cannot go below ground. if the offset is negative, v out will remain near 0v resulting in the transfer curve shown in figure 1. table 1. nominal v lsb and v fs values v cc v lsb v fs 4.5v 70.3mv 4.430v 5.0v 78.1mv 4.922v 5.5v 85.9mv 5.414v inl: integral nonlinearity is the maximum deviation from a straight line passing through the endpoints of the dac transfer curve. due to the LTC1695s single supply opera- tion and the fact that v out cannot go below ground, linearity is measured between full scale and the first code (code 01) that guarantees a positive output. the inl error at a given input code is calculated as follows: inl = (v out C v ideal ))/v lsb v ideal = (code ? v lsb ) + v os v out = the output voltage of the dac measured at the given input code dnl: differential nonlinearity is the difference between the measured change and the ideal 1lsb change between any two adjacent codes. the dnl error between any two codes is calculated as below: dnl = ( d v out C v lsb )/v lsb d v out = the measured voltage difference between two adjacent codes the d v out calculation includes the v os values to account for the effect of negative offset in figure 1. this is relevant for code 1s dnl. the offset of the part is measured at the first code (code 1) that produces an output voltage 0.5lsb greater than the previous code. v os = v out C [(code ? v fs )/(2 n C 1)] least significant bit (v lsb ): the least significant bit or the ideal voltage difference between two successive codes. v lsb = (v fs C v os )/(2 n C 1) figure 1. effect of negative offset output voltage dac code 0v negative offset 1695 ?f01
LTC1695 11 applicatio n s i n for m atio n wu u u overview the LTC1695 is a 5v brushless dc fan speed controller. fan speed is controlled by linear regulating the applied voltage to the fan. to program fan speed, a system controller or microprocessor first sends a 6-bit digital code to the LTC1695 via a 2-wire smbus/i 2 c interface. the LTC1695s dac then converts this digital code into a voltage reference. finally, the LTC1695s op amp loop regulates the gate bias of the internal p-channel pass transistor to control the corresponding output voltage. the LTC1695 is designed for portable, power-conscious systems that utilize small 5v brushless dc fans. these fans are increasingly popular in providing efficient cooling solutions in a small footprint. smaller fans allow a user to employ multiple fans at strategic physical locations to govern a systems thermal airflow (air duct concept). these brushless dc fans also make use of the 5v supply used by the main digital/analog circuitry, removing the need for a 12v supply required by higher power fans. the LTC1695s p-channel linear regulator control ap- proach offers the lowest solution component count, the smallest pcb board space consumed, wide fan speed control range and low acoustical/electrical generated noise. thermal concerns over the use of a linear regulator topol- ogy are eliminated by the fans generally resistive behav- ior. as the LTC1695 dac codes are changed to lower the output voltage, the voltage across the internal p-channel pass transistor increases. however, the fans load current decreases almost linearly, thereby controlling power dis- sipation in the regulator. for example, a micronel 5v, 0.7w fan (40mm 2 ? 12mm) draws 80ma at 4v and 20ma at 2v. thus the p-channel pass transistors power loss de- creases from 80mw to 60mw. the LTC1695 incorporates several features to simplify the overall solution including a boost start timer to ensure fan start-up, output current limiting and thermal shutdown. the boost start timer is enabled via the smbus commands and programs v out to full scale for 250ms before regulat- ing at the user programmed output voltage. this elimi- nates potential fan start-up problems at lower output voltage dac codes. the LTC1695s thermal shutdown circuit trips if die tem- perature exceeds 155 c. the p-channel pass transistor is shut off and bit d6 in the LTC1695s smbus data register is set high. if an overload or short-circuit condition occurs, the LTC1695s current-limit circuitry limits output current to 390ma typically. in addition, bit d7 in the smbus data register is set high. the readback capability of the LTC1695 allows the host controller to monitor the status of the d6 and d7 bits for fault conditions. smbus serial interface the LTC1695 is an smbus slave device that supports both smbus send byte and receive byte protocol (figure 2) with two interface signals, scl and sda. the smbus host initiates communication with the LTC1695 through a start bit followed by a 7-bit address code and a write bit. each smbus slave device in the system com- pares the address code with its specific address. for send byte and receive byte protocol, the write bit is low and high respectively. if selected, the LTC1695 acknowl- edges by pulling sda low. if send byte protocol is used, the host issues an 8-bit command code. after receiving the entire command byte, the LTC1695 again acknowledges by pulling sda low. at the falling edge of the acknowledge pulse, the LTC1695s dac latches in the new command byte from its shift register. if receive byte protocol is used, the LTC1695 acknowl- edges by pulling sda low after the write bit. the LTC1695 then transmits the data byte. after the host receives the entire data byte, the cycle is terminated by a not ac- knowledge bit and a stop bit.
LTC1695 12 applicatio n s i n for m atio n wu u u sistor capable of sinking 3ma at less than 0.4v during the slave acknowledge sequence. the LTC1695 is compatible with the philips/signetics i 2 c bus interface. the 1.4v threshold for scl and sda does not create any i 2 c application problems. early stop conditions if a stop condition occurs before the data byte is acknowl- edged in the write byte protocol, the LTC1695s dac is not updated. otherwise, the internal register is updated with the new data and v out changes accordingly to the new programmed value. address, command, data selection the LTC1695s address is hard-wired internally as 1110100 (msb to lsb, a6 to a0). consult ltc for parts with alternate address codes. consult the address, command and data byte tables for further information and as a concise reference. as shown in figure 2, d5 to d0 in the command code, control the linear regulators output voltage and thus fan speed. d5 to d0 are sent from the host to the LTC1695 during send byte protocol. the LTC1695 latches d5 to d0 as dac input data at the falling edge of the data acknowl- edge signal. the host must set bst (boost start enable bit) to high if the LTC1695s 250ms boost start timer option is used. all bits are reset to zero during power-on reset and uvlo. as shown in the timing diagram, bit 6 and bit 7 in the data byte register are defined as thermal shutdown status (the) and over current fault (ocf) status respectively. the LTC1695 sets ocf high if i load exceeds 390ma typically and the high if junction temperature exceeds 155 c typically. the remaining bits of the data bytes register (bit 5 to 0) are set low during host read back. scl and sda scl is the synchronizing clock signal generated by the host. sda is the bidirectional data transfer line between the host and a slave device. the host initiates a start bit by pulling sda from high to low while scl is high. the stop bit is initiated by changing sda from low to high while scl is high. all address, command and acknowledge signals must be valid and should not change while scl is high. the acknowledge bit signals to the host the acceptance of a correct address byte or command byte. the scl and sda input threshold voltages are typically 1.4v with 40mv of hysteresis. connect the scl and sda open-drain lines to either a resistive or current source pull up. the LTC1695 sda has an open-drain n-channel tran- figure 2. smbus interface bit definition 12345678910111213141516171819 s111010000x bst d5 d4 d3 d2 d1 d0 0 p 12345678910111213141516171819 s1110100 0 1 ocf the 0000001p slave address s = smbus start bit p = smbus stop bit bst = 1 enables the boost start timer d5 to d0 = 6-bit input code for the dac (d5 = msb) ocf = 1 signals that the LTC1695 is in current limit the = 1 signals that the LTC1695 is in thermal shutdown bit 18 = 1 is a not acknowledge for receive byte protocol note: during power up and uvlo, dac input bits (d5 to d0) and the bst bit are reset to zero command byte start stop a6 a5 a4 a3 a2 a1 a0 w a msb lsb a slave address data byte start stop a6 a5 a4 a3 a2 a1 a0 w a a smbus send byte protocol smbus receive byte protocol 1695 ?f02
LTC1695 13 linear regulator loop compensation the LTC1695s linear regulator approach is a simple and practical scheme for fan speed control featuring a wide and linear dynamic range. it also introduces less noise into the system supply rail, compared with a pwm scheme (fixed frequency, variable duty cycle), switching regulator topol- ogy or simple on-off control. the LTC1695 linear regulator feedback loop requires a capacitor at its output to stabilize the loop over the output voltage and load current range. the output capacitor value and the capacitors esr value are critical in stabilizing the LTC1695 feedback loop. a 3 1 m f general purpose, low to medium esr (0.1 w to 5 w ) tantalum or aluminium electrolytic capacitor is sufficient for most applications. these capacitor types offer a low- cost advantage, particularly for fan speed control applica- tions. as the output capacitance value increases, stability improves. a typical 4.7 m f, 1 w esr surface mount tanta- lum capacitor is recommended for the optimum transient response and frequency stability across temperature, v out and i load . refer to the load transient response waveforms in the typical performance characteristics section. the selection of the capacitor for c out must be evaluated by the user for temperature variation of the capacitance and esr value and the voltage coefficient of the capacitor value. for example, the esr of aluminium electrolytic capacitors can increase dramatically at cold temperature. therefore, the regulator may be stable at room tempera- ture but oscillate at cold temperature. ceramic capacitors with z5u and y5 dielectrics provide high capacitance values in a small package, but exhibit strong voltage and temperature coefficients (C80% in some cases). in addi- tion, the esr of surface mount ceramic capacitors is too low (<0.1 w ) to provide adequate phase-lead in the feed- back loop for stability. fan load and c load referring to figure 4, c load varies greatly depending on the type of fan used. the simplest, inexpensive fans contain no protection circuitry and input capacitance is on the order of 200pf. more expensive fans generally incor- porate a series-diode for reverse protection and input dac the LTC1695 uses a 128-segment resistor ladder to implement the monotonic 6-bit voltage dac (figure 3). guaranteeing monotonicity (no missing codes) permits the use of the LTC1695 in thermal feedback control applications. as the typical application uses a 5v supply for v cc, the reference for the 6-bit dac is v cc . ltc recommends a 10 m f or greater tantalum capacitor to bypass v cc . users must account for the variation in the dacs output absolute accuracy as v cc varies. v cc voltage should not exceed the absolute maximum rating of 7v or drop below the typical 2.8v undervoltage lockout thresh- old (uvlo) during normal operation. the LTC1695s dac specifications (inl, dnl, v os ) ac- count for the offset and gain errors of the linear regulator with respect to i load . consult the definitions section for more details. the worst-case condition occurs if the LTC1695 p-chan- nel pass transistor enters dropout at full-scale v out and i load. full-scale v out (v fs ) is 4.922v with v cc = 5v. in this condition, loop gain drops and gain error increases. the LTC1695 is designed for monotonicity up to v fs with dnl and inl less than 0.75 lsb. refer to the electrical char- acteristics and typical performance characteristics for more information. figure 3. ladder dac 64 resistor voltage tabs 720 switches v cc gnd reference op amp ?00000?= 0v ?11111?= 0.984 ?v cc /2 6 smbus command d5 to d0 v cc /2 1695 ?f03 applicatio n s i n for m atio n wu u u
LTC1695 14 thermal considerations the LTC1695s power handling capability is limited by the maximum rated junction temperature of 125 c. power dissipation (p diss ) consists of two components: 1. output current multiplied by the input/output voltage differential: (i load )(v cc C v out ), and 2. gnd pin current multiplied by the input voltage: (i gnd )(v cc ). p diss = (i load )(v cc C v out ) + (i gnd )(v cc ) t j = p diss ? ( q ja ) the LTC1695 has active current limiting and thermal shutdown circuitry for device protection during overload or fault condition. for continuous overload conditions, do not exceed the 125 c maximum junction temperature t j(max) . give careful consideration to all thermal resis- tance sources from junction to ambient. consider any additional heat sources mounted in proximity to the LTC1695. this is particularly relevant in applications where the LTC1695s output is loaded with a constant i load and v out is dynamically varied via the smbus. at lower dac output voltage codes, the increased input-to- output differential increases power dissipation if i load does not decrease. for the LTC1695s 5-lead sot-23 surface mount package, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces (in particular, the gnd pin trace). the following table lists measured thermal resistance results for various size boards and copper areas. all measurements were taken in still air on 3/32" fr-4 board with one ounce copper. table 2. measured thermal resistance ( q q q q q ja ) topside* backside board area 2500mm 2 2500mm 2 2500mm 2 125 c/w 1000mm 2 2500mm 2 2500mm 2 125 c/w 225mm 2 2500mm 2 2500mm 2 130 c/w 100mm 2 2500mm 2 2500mm 2 135 c/w 50mm 2 2500mm 2 2500mm 2 150 c/w *device is mounted on topside + + + op amp + + c gate c node v cc v out l fan c fan c out esr r1 r2 gnd equivalent dc fan circuit internal dac output p1(0.75 w ) 1695 ?f04 figure 4. regulator feedback loop capacitance ranges from 2pf to 30pf. as previously discussed, an output bypass capacitor is required to stabilize the feedback loop. this output capacitor is in parallel with the fans input capacitance and dominates the total capacitance. thus, stability is generally not affected by the fans input capacitance. the output capacitor also serves to filter the fans output ripple during commutation of the fans motor. por and uvlo under start-up conditions, the LTC1695 performs a power on reset (por) function. the digital logic circuitry is disabled and the regulator is held off. the smbus com- mand register (to the dacs input) and data register (current limit and thermal shutdown status) are reset to zero. the por signal deactivates if v cc rises above 2.9v typically. the LTC1695 is then allowed to communicate with the smbus host and drive the fan accordingly. upon exiting por, the regulators output voltage is set to v zs (code 0) until programmed by the smbus host. the LTC1695 enters uvlo if v cc falls below 2.8v typically. between 2.8v and 1v, the digital logic circuitry is disabled, the command/data registers are cleared and the regulator is shut down. in general, 100mv of hysteresis exists between the uvlo and por thresholds. applicatio n s i n for m atio n wu u u thermal resistance (junction to ambient) copper area
LTC1695 15 scale (v fs ) until junction temperature decreases to approximately 105 c. this extended timer period is an attempt to cool down the system and the LTC1695 by running the fan at full speed. in most cases, such elevated ambient temperatures require the fan to run at full speed anyway. the remaining LTC1695s functionality remains unchanged. thermal shutdown, overcurrent the LTC1695 shuts down the p-channel linear regulator if die temperature exceeds 155 c typically. the thermal shutdown circuitry employs about 30 c of hysteresis. as previously mentioned, the LTC1695 sets bit 6 (the) in the smbus data byte register high during thermal shutdown conditions. during a fault condition, the LTC1695s smbus logic continues to operate so that the smbus host can read back the fault status data. during an overload or short-circuit fault condition, the LTC1695s current-limit detector sets bit 7 (ocf) in the smbus data byte register high and actively limits output current to 390ma typically. this protects the LTC1695s p-channel pass transistor. under dead short conditions with v out = 0v, the LTC1695 also clamps the output current. however, the increased power dissipation (5v ? 390ma = 1.95w) eventually forces the LTC1695 into thermal shutdown. the LTC1695 will then thermally oscil- late until the fault condition is removed. during recovery from thermal shutdown (typically 125 c), the LTC1695 automatically activates the boost start timer, programming the fan voltage to full scale for 250ms (t bst_st ), before switching to the user programmed out- put voltage value. this again eliminates fan start-up prob- lems if the thermal shutdown fault occurred while the fan was previously operating at an output voltage below the fans starting voltage. in addition, as discussed, the boost start timer will keep v out at v fs for an extended time period beyond t bst_st until the LTC1695s junction tem- perature drops below 105 c. the LTC1695s protection features protect itself, the fan, and more importantly alerts the smbus host to any system thermal management fault conditions. for further information, refer to the junction temperature increase (above ambient temperature) vs i load graph in the typical performance characteristics section. this graph provides a fast and simple junction temperature estimation with various v out (dac code) and i load combinations for a typical application. boost start timer in general, a 5v brushless dc fan starts at a voltage value higher than the voltage at which it stalls. this behavior is directly attributed to the force necessary to overcome the back emf of the fan. for example, one fan measured started at 3.5v but operated until its terminal voltage fell below 2.1v. therefore, users must ensure start-up in the fan before programming the fan voltage to a value lower than the starting voltage. monitoring the fans dc current for a stalled condition does not work due to the fans resistive nature. fans can sink load current even though they are not rotating. other approaches include detecting absence of the fans commutation ripple current and tachometers. in general, these approaches are more com- plex, require more circuitry, add cost and have to be customized for the specific fan used. the LTC1695 contains a programmable boost start timer offering three flexible solutions to the user: 1.) enable the boost start timer bit (d6 in the dac com- mand code). each time a new output voltage is pro- grammed, the timer forces v out to full scale (4.922v nominal with v cc = 5v) for 250ms before assuming the programmed output voltage value. this ensures fan start up even if the programmed output voltage is below the fans start threshold. 2.) users may also choose to use a software timer routine inside the host controller to power the dc fan, at full scale, for a programmed time period before programming v out to a lower desired dac output voltage code. 3.) users may choose a tachometer fan that feedbacks its speed to the smbus host. if fan stall conditions are detected, the smbus host re-programs the LTC1695. beyond a typical 125 c LTC1695 junction temperature, the boost start timer (if activated) maintains v out at full applicatio n s i n for m atio n wu u u
LTC1695 16 table 4 lists some 5v brushless dc fans suitable for typical LTC1695 fan speed control applications. figure 5 shows the measured i-v characteristics of these fans. for a particular fan selection, users must determine the mini- mum dac output voltage code below which the fan stalls. most fans continue to consume current, even in a stalled condition. table 4. some 5v dc fans characteristics manufacturer part number airflow power size (cfm) (w) (l ? w ? h)mm 3 sunon kde0501pfb2-8 0.65 0.50 20 ? 20 ? 10 atc ad0205hb-g51 0.80 0.45 25 ? 25 ? 10 sunon kde0502pfb2-8 1.70 0.60 25 ? 25 ? 10 sunon kde0503pfb2-8 3.20 0.60 30 ? 30 ? 10 sunon kde0535pfb2-8 4.80 0.70 35 ? 35 ? 10 micronel f41mm-005xk-9 6.10 0.70 40 ? 40 ? 12 dc fan selection the LTC1695, in the 5-lead sot-23 package, caters mainly to 5v brushless dc fans, in spot cooling and notebook computer applications, that consume less than 1w maxi- mum. these applications typically require fan footprints on the order of 4000mm 3 to 20000mm 3 . such fan sizes are common and commercially available. examples of these miniature fans are the ultra-thin dc fan and extra-mini dc fan from sunon inc. models in these series range from 17mm to 40mm in size, weigh from 4 grams to 10 grams and provides airflow densities from 0.65 cfm to 6 cfm. users must consider parameters like physical size (l ? w ? h), airflow (cfm), power dissipation (w) and acoustically generated noise (dba) when choosing a fan. users must also evaluate the fans i-v characteristics versus fan speed and the start/stall characteristics of the fan. other factors include mechanical considerations such as low cost sleeve bearings or ball bearings that have better long term reliability. finally, users must consider if the fan requires any input protection features such as reverse-voltage protection. all of these factors affect the fans cost. table 3 lists some 5v fan manufacturers contact informa- tion. table 3. 5v dc fan manufacturers manufacturer address sunon inc. 1075 w. lambert rd., brea, ca 92821 tel: (714)255-0208 website: http://www.sunon.com advanced technology 1280 liberty way, vista, ca 92083 company tel: (760)727-7430 nidec america 152 will dr., canton, ma 02021 tel: (781)828-6216 website: http://nidec.com nmb technologies inc. 9730 independence ave., chatsworth, ca 91311 tel: (818)341-3355 website: http://www.nmbtech.com micronel 1280 liberty way, vista, ca 92083 tel: (760)727-7400 website: http://www.micronel.com terminal voltage (v) 0 current (ma) 150 125 100 75 50 25 0 1 234 1695 ?f05 5 t a = 25 c kde0501pfb2-8 kde0535pfb2-8 kde0502pfb2-8 ad0205hb-g51 kde0503pfb2-8 f41mm-005xk-9 figure 5. i-v characteristics of 5v brushless dc fan samples applicatio n s i n for m atio n wu u u
LTC1695 17 smbus data byte table (receive byte protocol) decimal binary hex LTC1695 status msb lsb 0 00000000 00 no fault 128 10000000 80 overcurrent fault/clamp 64 01000000 40 thermal shutdown during thermal shutdown, the LTC1695s ldo is shut off. decimal binary hex nominal v out (v) (d5 to d0) msb lsb (d6-d7 set to 0) i load = 1ma 32 x0100000 20 2.500 33 x0100001 21 2.578 34 x0100010 22 2.656 35 x0100011 23 2.734 36 x0100100 24 2.813 37 x0100101 25 2.891 38 x0100110 26 2.969 39 x0100111 27 3.047 40 x0101000 28 3.125 41 x0101001 29 3.203 42 x0101010 2a 3.281 43 x0101011 2b 3.359 44 x0101100 2c 3.438 45 x0101101 2d 3.516 46 x0101110 2e 3.594 47 x0101111 2f 3.672 48 x0110000 30 3.750 49 x0110001 31 3.828 50 x0110010 32 3.906 51 x0110011 33 3.984 52 x0110100 34 4.063 53 x0110101 35 4.141 54 x0110110 36 4.219 55 x0110111 37 4.297 56 x0111000 38 4.375 57 x0111001 39 4.453 58 x0111010 3a 4.531 59 x0111011 3b 4.609 60 x0111100 3c 4.688 61 x0111101 3d 4.766 62 x0111110 3e 4.844 63 x0111111 3f 4.922 d6 = 0 disables the boost start timer. d7 = x = dont care smbus address byte table decimal hex smbus protocol 232 e8 send byte to the LTC1695 233 e9 receive byte from the LTC1695 the lsb of the smbus address is the write bit. for send byte protocol, w = 0. for receive byte protocol, w = 1 smbus command byte table (send byte protocol) decimal binary hex nominal v out (v) (d5 to d0) msb lsb (d6-d7 set to 0) i load = 1ma 0 x0000000 00 0.000 1 x0000001 01 0.078 2 x0000010 02 0.156 3 x0000011 03 0.234 4 x0000100 04 0.313 5 x0000101 05 0.391 6 x0000110 06 0.469 7 x0000111 07 0.547 8 x0001000 08 0.625 9 x0001001 09 0.703 10 x0001010 0a 0.781 11 x0001011 0b 0.859 12 x0001100 0c 0.938 13 x0001101 0d 1.016 14 x0001110 0e 1.094 15 x0001111 0f 1.172 16 x0010000 10 1.250 17 x0010001 11 1.328 18 x0010010 12 1.406 19 x0010011 13 1.484 20 x0010100 14 1.563 21 x0010101 15 1.641 22 x0010110 16 1.719 23 x0010111 17 1.797 24 x0011000 18 1.875 25 x0011001 19 1.953 26 x0011010 1a 2.031 27 x0011011 1b 2.109 28 x0011100 1c 2.188 29 x0011101 1d 2.266 30 x0011110 1e 2.344 31 x0011111 1f 2.422 d6 = 0 disables the boost start timer. d7 = x = dont care applicatio n s i n for m atio n wu u u
LTC1695 18 applicatio n s i n for m atio n wu u u smbus command byte table (boost start timer enabled) decimal binary hex nominal v out (v) (d5 to d0) msb lsb (d7 set to 0) load = 1ma 0 x1000000 40 0.000 1 x1000001 41 0.078 2 x1000010 42 0.156 3 x1000011 43 0.234 4 x1000100 44 0.313 5 x1000101 45 0.391 6 x1000110 46 0.469 7 x1000111 47 0.547 8 x1001000 48 0.625 9 x1001001 49 0.703 10 x1001010 4a 0.781 11 x1001011 4b 0.859 12 x1001100 4c 0.938 13 x1001101 4d 1.016 14 x1001110 4e 1.094 15 x1001111 4f 1.172 16 x1010000 50 1.250 17 x1010001 51 1.328 18 x1010010 52 1.406 19 x1010011 53 1.484 20 x1010100 54 1.563 21 x1010101 55 1.641 22 x1010110 56 1.719 23 x1010111 57 1.797 24 x1011000 58 1.875 25 x1011001 59 1.953 26 x1011010 5a 2.031 27 x1011011 5b 2.109 28 x1011100 5c 2.188 29 x1011101 5d 2.266 30 x1011110 5e 2.344 31 x1011111 5f 2.422 d6 = 1 enables the boost start timer. d7 = x = dont care decimal binary hex nominal v out (v) (d5 to d0) msb lsb (d7 set to 0) i load = 1ma 32 x1100000 60 2.500 33 x1100001 61 2.578 34 x1100010 62 2.656 35 x1100011 63 2.734 36 x1100100 64 2.813 37 x1100101 65 2.891 38 x1100110 66 2.969 39 x1100111 67 3.047 40 x1101000 68 3.125 41 x1101001 69 3.203 42 x1101010 6a 3.281 43 x1101011 6b 3.359 44 x1101100 6c 3.438 45 x1101101 6d 3.516 46 x1101110 6e 3.594 47 x1101111 6f 3.672 48 x1110000 70 3.750 49 x1110001 71 3.828 50 x1110010 72 3.906 51 x1110011 73 3.984 52 x1110100 74 4.063 53 x1110101 75 4.141 54 x1110110 76 4.219 55 x1110111 77 4.297 56 x1111000 78 4.375 57 x1111001 79 4.453 58 x1111010 7a 4.531 59 x1111011 7b 4.609 60 x1111100 7c 4.688 61 x1111101 7d 4.766 62 x1111110 7e 4.844 63 x1111111 7f 4.922 d6 = 1 enables the boost start timer. d7 = x = dont care
LTC1695 19 package descriptio u dimensions in inches (millimeters) unless otherwise noted. 0.95 (0.037) ref 1.50 ?1.75 (0.059 ?0.069) 0.35 ?0.55 (0.014 ?0.022) 0.35 ?0.50 (0.014 ?0.020) five places (note 2) s5 sot-23 0599 2.80 ?3.00 (0.110 ?0.118) (note 3) 1.90 (0.074) ref 0.90 ?1.45 (0.035 ?0.057) 0.90 ?1.30 (0.035 ?0.051) 0.00 ?0.15 (0.00 ?0.006) 0.09 ?0.20 (0.004 ?0.008) (note 2) 2.60 ?3.00 (0.102 ?0.118) note: 1. dimensions are in millimeters 2. dimensions are inclusive of plating 3. dimensions are exclusive of mold flash and metal burr 4. mold flash shall not exceed 0.254mm 5. package eiaj reference is sc-74a (eiaj) s5 package 5-lead plastic sot-23 (ltc dwg # 05-08-1633) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1695 20 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com ? linear technology corporation 2000 1695f lt/tp 0400 4k ? printed in usa related parts part number description comments lt1120 125ma low dropout pnp linear regulator with 40 m a 0.6v dropout voltage at 125ma quiescent current lt1121 150ma low dropout pnp linear regulator with 30 m a 0.5v dropout voltage at 150ma, so8/sot-223 package quiescent current ltc1380/ltc1393 single-ended 8-channel/differential 4-channel analog low r on : 35 w single-ended/70 w differential, mux with smbus interface expandable to 32 single or 16 differential channels ltc1427-50 micropower, 10-bit current output dac precision 50 m a 2.5% tolerance over temperature, with smbus interface 4 selectable smbus addresses, dac powers up at zero or midscale lt1521 300ma low dropout pnp linear regulator with 12 m a 0.5v dropout voltage at 150ma, so8/sot-223 package quiescent current ltc1623 dual high side switch controller with smbus interface 8 selectable addresses/16-channel capability ltc1663 smbus interface 10-bit rail-to-rail micropower dac dnl < 0.75lbs max, 5-lead sot-23 package ltc1694/ltc1694-1 smbus accelerator improved smbus/i 2 c rise time, ensures data integrity with multiple smbus/i 2 c devices lt1761 100ma, low noise, ldo micropower regulator 0.3v dropout voltage at 100ma, sot-23 package lt1762 150ma, low noise, ldo micropower regulator 0.3v dropout voltage at 150ma, msop package lt1786f smbus controlled ccfl switching regulator 1.25a, 200khz, floating or grounded lamp configurations typical applicatio n u led1 r1 100 led2 r2 100 led3 r3 100 led4 r4 100 led5 r5 100 led6 r6 100 c2 10 f 10v c1 10 f 6.3v 1 2 34 5 v out sda sda scl scl gnd v cc LTC1695 5v to c led = hewlett packard hlmp-cw30 c2 = sprague 595d106x0010a2t 1695 ?ta03a + + output voltage (v) 20 18 16 14 12 10 8 6 4 2 0 led current (ma) 1695 ?ta03b 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v fs output voltage vs led current smbus i 2 c controlled white led driver

▲Up To Search▲

Price & Availability of LTC1695

	To Download LTC1695 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .